Favilla notes · defensive publication · October 2026
The KEY is a connected Nostr signer and an offline bitcoin wallet in the same box. This is how the secure element keeps the seed shut to everything but a physically fresh boot, written down in full so that nobody can patent it.
A hardware wallet that is also always online has a problem. The connected half is where a remote exploit is most likely. The offline half is where one would be permanent. We wanted a guarantee, not a convention: code running in the Nostr life must not be able to reach the bitcoin seed, not even by rebooting the processor into the bitcoin life, and the only thing that reopens the bitcoin life is pulling the power, which clears any exploit from memory before the seed is ever decrypted. The guarantee had to be enforced by a part the application processor cannot impersonate.
The full technical note is below as a PDF. This page is the short version and the public record of the publication.
We are not filing a patent on this. A dated, public, enabling description is prior art: once it is out, nobody else can validly patent the same mechanism, in Australia, the US or Europe. That is the outcome we want. The idea belongs to anyone who wants to build it, and the only thing a patent would have bought us is the right to stop them.
The one risk of this route is an examiner not finding the write-up. So the note is written to be found and to be complete: every secure-element object identifier, every policy, the exact byte derivation of every latch value, a sequence diagram from cold boot to key gating, and a list of everything the design does not claim. A competent embedded engineer can reproduce it from the PDF alone. If a change in plan ever did mean a patent, Australia's twelve month grace period for an inventor's own disclosure runs to the complete application, so this page does not close that door. It just means we would need to decide before 21 October 2027.
Inside the NXP SE051 there is one persistent 32-byte register, a PCR, that we call the mode latch. A PCR can only be moved forward: each write hashes the new data onto the old value, and only a holder of the DELETE right can reset it to its starting point. The two PINs can extend it but never reset it. The STM32G0, a second microcontroller whose reset pin goes only to the programming pads, is the only party with the reset right, and it will reset the latch exactly once per physical boot of itself. The bitcoin seed key is wrapped by an SE key whose decrypt right is granted to the bitcoin PIN only while the latch equals a value that is derived from a secret held in the G0 and nowhere else. The Nostr key's wrap is granted to the G0 only while the latch equals the public Nostr value.
Once the Nostr PIN has moved the latch, nothing the application processor can do, with or without any PIN, with or without a reboot, brings it back to a value the seed key will accept. Only pulling the power does.
| Value | Derivation | Who can produce it |
|---|---|---|
| NEUTRAL | SHA256(32 zero bytes) | The G0's once-per-boot reset |
| NOSTR | SHA256(NEUTRAL ‖ "FAVILLA-MODE-NOSTR") | The Nostr PIN, from NEUTRAL |
| BTC | SHA256(NEUTRAL ‖ S) | The G0 only; S never leaves it |
| SPENT | SHA256(BTC ‖ "FAVILLA-MODE-SPENT") | The G0, immediately after every seed use |
| ARM | SHA256(x ‖ "FAVILLA-MODE-ARM") | The bitcoin PIN, as proof to the G0 that a PIN was entered |
In the bitcoin life every signature goes through the whole cycle: the bitcoin PIN arms the latch, the G0 resets it and mints BTC, the secure element strips its layer of the seed for that PIN session, and the G0 burns the latch to SPENT before it strips its own layer and signs. BTC exists in the latch for milliseconds. A crash, a power-off or a removed G0 leaves SPENT, which opens nothing.
The note records the parts of the chip's documented behaviour that did not hold on silicon, because those are the parts a reader would otherwise trust and be wrong about.